In-Operando X-ray diffraction imaging of thermal strains in fully packaged silicon devices
Introduction
As manufacturers seek to meet forthcoming challenges associated, for example, with healthcare and the Internet of Things, an increasing number of heterogeneously packaged chips are appearing on the market. This reflects the ongoing transition from “More Moore” (MM) to “More than Moore” (MtN) approaches [1,2] for next generation devices and systems. The development of heterogeneously integrated chip packages will play a leading role in this evolution, which will most likely see the convergence of packaging and system integration [3]. Examples include 2D, 2.5D and 3D on-package integration approaches, fan-out wafer level packaging, and embedded die [4]. In many instances these advanced packages consist of vertically stacked and interconnected multiple layers of silicon. As a result, there has been a drive both to reduce the thickness of the silicon die/wafers used as well as the total thickness of the package. The thin die are subject to warpage when packaged and this has been found to be particularly problematic in multiple chips stacks with through‑silicon via interconnection [5]. However, the reduction in package thickness has enabled non-destructive transmission X-ray Diffraction Imaging (XRDI) techniques [6,7] to be employed to map quantitatively the wafer distortions [8,9] and under stressed operating conditions [10].
Silicon drive transistors can dissipate substantial energy and 0.5 W is not atypical. It is known that the life of a device reduces by a factor of about 2 for every 10 °C increase in operating temperature and that operation at over 175 °C is likely to result in short-term failure. Monitoring of the outside of the package can give clues as to the internal temperature but there are some questions that are difficult to determine from such macroscopic measurements. These include the question of how localized are the strains associated with electrical overload of specific silicon bipolar junction transistors and what is the magnitude of those strains? Does the thermal strain extend enough to warp the wafer macroscopically within its package? How to monitor the device temperature is a technical challenge.
The ability of X-rays of typically 30–40 keV energy to penetrate fully encapsulated devices also opens up the possibility of using XRDI techniques to measure, in operando, the local strain associated with individual components on the die/wafer running under conditions of electrical overload. Modelling of device behaviour is sophisticated and detailed, but it does rely on experimental data relating to the actual operation of the device. As local thermal load generates local thermal strains, there are two options for sensors built into chip architecture. Inclusion of a diode close to the component under consideration allows a direct measurement of temperature to be recorded or fabrication of piezoelectric sensors on the wafer allows a direct measurement of strain to be obtained at that point. Neither technique is realistic if data from more than a few devices are required and both strategies add cost to manufacturing processes that are dependent on low margins and high volume to be commercially viable. As we show in this paper, XRDI, which is also known as X-ray Topography, enables local strains to be detected and identified at individual devices in operando in fully packaged chips. The technique is non-invasive and non-destructive.
Section snippets
Experimental techniques
XRDI experiments have been performed on discrete n-p-n bipolar junction transistors fully encapsulated in a LM3046 chip package at the B16 beamline of the Diamond Light Source in Oxfordshire in the United Kingdom. Beamline B16 is a multi-purpose test beamline capable of being operated in white beam, “pink” beam or monochromatic mode. Technical details can be found on the Diamond Light Source website. We selected the LM3046 Small Outline Integrated Circuit (SOIC) transistor array because it is
Full chip diffraction imaging
The first, and critically important result was that with the beam slits at 7 mm × 4.4 mm and thus the white X-ray beam illuminating the whole 1mm2 sample, there were no changes in the electrical characteristic compared with no X-ray illumination. Previous in operando XRDI of III-V based lasers [12,13] and ultra-fast recording of crack propagation in silicon [14] at the European Synchrotron Facility had been undertaken using monochromatic radiation where the heat load was much smaller than in
Discussion
Because there is very low absorption of X-rays within the silicon wafer chip itself, the image formation is not complicated by dynamical diffraction effects. The enhanced intensity corresponds to the so-called “kinematical image” in XRDI, where the image is formed in the deformed region by X-rays that are not diffracted by the perfect crystal. To a first approximation, the image is formed when the effective misorientation (Eq. (1)) exceeds the Darwin width, that is the fundamental diffracting
Conclusions
The above results provide a proof-of-principle demonstration of the possibility of using X-ray Diffraction Imaging as a means of monitoring the temperature of individual components of a packaged chip during operation. While the above value cannot be immediately transferred to other components and packages, we have shown that calibration is possible and that the localized image does scale with power dissipated in the device. There is a challenge to transfer the technique from a synchrotron
Acknowledgements
PMN, RKV & BR acknowledge the support of Science Foundation Ireland (SFI) under Grant Number 16/RC/3872 which is co-funded under the European Regional Development Fund. We thank the Diamond Light Source (UK) for access to beamline B16 (proposal MT17275-1; Kawal Sawhney, Oliver Fox & Andrew Malandain) that contributed to the results presented herein.
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